As a device whose circuit configuration can be arbitrarily changed by a user, a programmable logic device (PLD) is known.
A logic element included in the PLD includes a lookup table (LUT) and a register. When data stored in a configuration memory included in the LUT is changed, a function of the logic element can be changed.
Patent Document 1 discloses a circuit configuration in which a transistor containing a metal oxide serving as a semiconductor in its channel formation region (OS transistor) is connected to a gate of a transistor containing silicon in its channel formation region (Si transistor). With the circuit configuration, configuration data and data in the register can be held even when the PLD is in an off state.
Patent Document 2 discloses a configuration in which an OS transistor is connected to a gate of a Si transistor and data in the register is held even when a central processing unit (CPU) is in an off state. The CPU performs a variety of kinds of arithmetic processing in accordance with a program to be executed. A PLD or a GPU can be used as a coprocessor in order to improve the arithmetic processing performance of the CPU.